Projects and Partners

Our team is involved in several networks

European :

National :

Regional :



H2020-HECTORHardware Enable CrypTO and Randomness

Funding: European H2020 project
36-month project (2015-2018)
Web site: https://hector-project.eu/

It is commonly accepted that the way cryptographic algorithms are implemented in hardware is at least as important as their mathematical robustness. Side-channel-attacks and hardware-attacks in general represent the most severe threats to modern cryptographic systems. This tension between mathematical security, implementation security and efficiency is addressed by the HECTOR project. HECTOR consortium pursues a hardware-aware approach for the design of efficient and secure-by-design random number generators (RNGs), Physically Uncloneable Functions (PUFs) and Cryptographic primitives. This will enable demonstrating practical security levels, easier and faster certification and more efficient and globally competitive implementations.

Partners

  • Technikon, Austria (Coordinator)
  • Université Jean Monnet – Lab. H. Curien, France
  • Katholieke Universiteit Leuven, Belgium
  • Technical University of Graz, Austria
  • Thales Communications & Security SAS, France
  • STMicroelectronics SAS, France
  • STMicroelectronics SRL, Italia
  • Micronic a.s., Slovaquia
  • Brigtshight BV, Netherlands

Contact
fischer (at) univ-st-etienne.fr



FUI-PILASProcédés d’injection laser avancés pour analyses sécuritaires

Funding: 22nd FUI – Route des lasers, MINALOGIC and SCS labels
36-month project (2017-2020)

The PILAS project plans to develop a system and methodology of advanced laser fault injection, enabling security evaluators to improve their capabilities to identify and exploit new attack scenarios. This process will be applied to different hardware and software component to validate its efficiency and improve its performance. 

Partners

  • Sagem Identity & Security (Coordinator)
  • STMicroelectronics
  • Université Jean Monnet, Lab. H. Curien
  • Alphanov
  • Serma Safety & Security

Contact
lilian.bossuet (at) univ-st-etienne.fr



FUI-TEEVATrusted Execution EVAluation

Funding: 20th FUI – SCS label
36-month project (2015-2018)

The TEEVA plans to evaluate the security of a trust execution environment (TEE) and then to compare this solution with white-box cryptography.

Partners

  • GEMALTO (Coordinator),
  • Université Jean Monnet, Lab. H. Curien
  • Université Montpellier, LIRMM
  • Ecoles des Mines de Saint-Etienne
  • Trustonic
  • PhoneSec

Contact
lilian.bossuet (at) univ-st-etienne.fr



Convention DGAEtude sur les techniques de mesure embarquée du jitter et leurs implantations dans les circuits électroniques.

Fundings: convention de subvention DGA
48-month project (2016-2019)

The main objective of the project is to study and propose precise modeling of noise sources inside electronic devices and the digital processing of noisy signals in order to propose a stochastic model for different types of P-TRNG principles. The main objective is to give an estimation of the entropy rate per bit.
After studying existing models and/or new proposals, we expect to propose measurement methods and embedded tests, as close as possible to the entropy source, to guarantee that the generated entropy per bit is sufficient.
One very important part of this work is to propose digital simulations of P-TRNG principle that can be used, knowing the characteristics of an input jitter, to find back these characteristics with the proposed measurement methods and/or embedded tests.

Partners

  • Université Jean Monnet, Lab. H. Curien
  • Direction générale de l'armement, Bruz

Contact
florent.bernard (at) univ-st-etienne.fr



ANR-SALWAREConception de matériel salutaire pour lutter contre la contrefaçon et le vol de circuits intégrés

Fundings: ANR JCJC-2013, FRAE, Région Rhône-Alpes – MINALOGIC Label
46-month project (2013-2017)
Web site: http://www.univ-st-etienne.fr/salware/

Fabless semiconductor industries are facing the rise of design costs of integrated circuits. This rise is link to the technology change and the complexity increasing. It follows that integrated circuits have become targets of counterfeiting and theft. The SALWARE project aims to study (theoretically and experimentally) salutary hardware design in order to fight against theft, illegal cloning and counterfeiting of integrated circuits.

Contact
lilian.bossuet (at) univ-st-etienne.fr



ANR-TSUNAMYHardware and software managemenT of data SecUrity iN A ManYcore platform

Funding: ANR INS-2013 – MINALOGIC and Images&Réseaux Labels
46-month project (2013-2017)
Web site: https://www.tsunamy.fr/trac/tsunamy

The TSUNAMY project addresses the problem of secure handling of personal data and privacy in manycore architectures. The economic and social issues are numerous as this type of architecture will be massively deployed in the future both in infrastructure such as "cloud computing" (main purpose of this project) and in most embedded systems constrained in resources and performance. It is essential to address the question of the definition of these architectures in terms of not only performance but also security to ensure adoption of these technologies by end users. Lack of trust will be a hindrance to economic development, the challenges are immense. To propose an efficient and secure solution it is necessary to propose hardware architectures with closely coupling of heterogeneous processing resources (some dedicated to the processing of data in clear and some dedicated for treatment of protected data). It is also necessary to rethink the relationship between software and hardware to ensure a protection in depth. Today these issues are too often neglected resulting in solutions developed at the end of the design cycle. It is essential to provide a breakthrough in these design approaches to provide trusted architectures by building hardware and software. The TSUNAMY project aims to propose a solution of trust building to execute many independent applications in parallel, safely and ensuring respect for the privacy of users.

Partners

  • Université de Bretagne Sud, Lab-STICC (Coordinator)
  • Université Jean Monnet, Lab. H. Curien
  • UPMC, LIP6
  • CEA - LIST

Contact
lilian.bossuet (at) univ-st-etienne.fr



ETAMACEtude d’attaques matérielles et combinées (logicielles-matérielles) sur des processeurs embarqués pour l’amélioration de la sécurité des applications mobiles communicantes

Fundings: ANRT (these CIfre) - GEMALTO
36-month project (2014-2017)

Partners

  • Université Jean Monnet, Lab. H. Curien
  • GEMALTO

Contact
lilian.bossuet (at) univ-st-etienne.fr