Seminar by Yuko Hara: "Towards Side Channel-aware Design Automation Technology"
The Thursday, March 13, 2025
at 1pm
Room F021b
Laboratoire Hubert Curien,
18 Rue Professeur Benoît Lauras,
42000 Saint-Etienne
Yuko Hara, Associate Professor, Department of Information and Communications Engineering, Institute of Science Tokyo, Tokyo, Japan
"Towards Side Channel-aware Design Automation Technology"
Abstract
In this talk, I will present an ongoing research project about hardware security and electronic design automation (EDA) technology in our group at Institute of Science Tokyo (formerly Tokyo Institute of Technology), Japan. The goal of this project is to build a security-aware EDA framework to let hardware designers efficiently design power side-channel resistant circuits, which are very tricky to implement. The recent achievement I am going to talk about is still an immature but important step for this goal. I will talk about the insights that we obtained from this early achievement to further progress in a big, long-term project that I'd like to pursue.
This seminar will be held in English.